Adam Edvardsson

• Design and implementation of IP block from RTL to Synthesize and verification
• Responsible for mailbox system for buffering and synchronization of C and U-plane data in the RU
• Frequency translation using DDS
• Proved successful working within tight deadlines and fast-paced atmosphere.
• Specification and formal documentation handling – RTL implementation – Vivado synthesize – Verification and unit testing in Quartus simulation

• Working on DPD implementation for ASIC, responsible for bringing algorithms to target analyzing and testing of sub functions in simulation and on FPGA test-platform
• Development of models, unit-tests and on-board test
• Strict quality control and verification is a must when working with AISC design flow -Filter implantation mapping to ASIC and FPGA -Verification of functional models simulation and FPGA board -Vivado & Quartus implementation -Specification and formal documentation handling -Matlab modelling and algorithm development

• Mainly focusing on front end receivers from ADC to Signal descriptor level.
• Customer driven project, involved from prototype to production stage.
• Technical design authority for several subsystem which lead to i acquired a good knowledge in
  surrounding fields like HW, RF and software design
• Wide range of daily tasks working in SCRUM team

Filter and FFT implementation on DSP block in FPGA
-Bringing models from matlab/SysML to VHDL
-System architecture for complex distributed system in SysML
-Legacy interface, ADC interface, Parallel SerDes and newer high speed interface as JESD 204
-Testbench and verification on component level up to subsystem level using Modelsim and Vunit.
-In depth knowledge of Xilinxs FPGA from Virtex 6 up to Virtex Ultrascale+
-Experienced in Xilinx Vivado and ISE tool suite, constraints, timing, scripting, SDK and HAL

• Worked with FPGA, Embedded software and IP design
• Small company where everyone has to help where needed, a good mix of high and low
• As part of a development team of a property CPU(OpenRISC) I acquired a very good knowledge of processor architecture
• Device driver development for Linux OS (USB, SDCard, Ethernet, I2C etc) -Verilog IP development of an SDCARD Host -Testbench development and verification of IP-cores that was included in the ORSoC
• PCB clock and signal integrity analyses and redesign proposal, at Bombardier
• Product development disk drive replacement for EOF ABB robots, at Swerob -SoC Custom IP modules for ÅAC Microtec satellite platform